Clever Test Rig Clarifies Capacitor Rules-of-Thumb

If you have accomplished any sum of digital layout do the job, you are going to be acquainted with the need for decoupling capacitors. From time to time a chip’s datasheet will notify you accurately what type of caps to spot where, but quite frequently you’ll have to count on experience and procedures of thumb. For case in point, you may possibly have heard that you must place 100 µF throughout the energy supply pins and 100 nF shut to just about every chip. But how shut is “close”? And can that more substantial cap really sit anywhere? [James Wilson] has been doing exploration to get some company answers to individuals queries, and wrote down his results in a interesting blog post.

A PCB used to measure the effect of capacitor placement
The take a look at board has two-layer and 4-layer sections. The inter-layer capacitance enormously impacts the PDN’s functionality in each circumstance.

[James] created a established of circuit boards that enabled him to spot distinctive kinds of capacitors at different distances together a established of PCB traces. By measuring the impedance of these types of a electricity distribution community (PDN) across frequency, he could then compute its functionality beneath diverse situations.

The best device for those people measurements would have been a vector network analyzer (VNA), but for the reason that [James] did not have these an instrument, he designed a a little bit less complicated setup working with a spectrum analyzer with a tracking generator. This can only evaluate the impedance’s magnitude, without having any section info, but that must be fantastic enough for simple PDN characterization.

The effects of [James]’s exams are fairly fascinating, if not way too surprising. For case in point, individuals 100 nF capacitors truly should to be placed within just 10 mm of your chip if it’s working at 100 MHz, but you can get absent with even 10 cm if no alerts go much earlier mentioned 1 MHz. A bulk 100 µF cap can be positioned at 10 cm devoid of significantly penalty in both circumstance. Combining various capacitors of growing dimensions to get a reduced impedance throughout frequency is a superior idea in basic principle, but you have to have to style the network cautiously to keep away from resonances involving the a variety of factors. This is the place a not-far too-very low equivalent sequence resistance (ESR) is essentially a superior issue, for the reason that it allows to dampen those resonances.

In general, [James]’s weblog submit is a great primer on the matter, and provides a little bit of a great deal-required context to those people procedures of thumb. If you want to dive further into the aspects of PDN structure or the inductance of PCB traces, our possess [Bil Herd] has produced some fantastic movies on all those matters.

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